Digital Signature and IP Steganography for Securing Hardware Accelerator

Reusable Intellectual Property (IP) cores from signal processing and multimedia form an integral part of Consumer Electronics (CE) systems. However, owing to the value it represents, it needs protection against important threats such as piracy and illegal claim of ownership. This talk presents a novel multi-level encoding and encrypted-hash based digital signature for protection of complex reusable IP core used in CE Systems. This talk also discusses a key-driven hash-chaining based hardware steganography for securing such IP cores used in CE systems. The proposed approach is capable of implanting secret invisible stego-marks in design using a hash-chaining process that incorporates switches, strong large stego-keys, multiple encoding algorithms and hash blocks. The methodology proposed provides strong security against IP cloning and counterfeiting while incurring nominal design overhead. For the latest Tech News, visit https://bit.ly/2z6C4q9 For information on Membership Benefits, visit https://bit.ly/2Rzxsz2